Topology-Optimized Ultracompact All-Optical Logic Devices on Silicon Photonic Platforms

The realization of all-optical integration and optical computing has always been our goal. One the most significant challenges is to make integrated logic devices as small possible. Here, we report implementation ultracompact chips on silicon photonic platforms by topology optimization. footprint for fabricated gates with XOR OR functions only 1.3 × μm2 (∼0.84λ 0.84λ) that are smallest dielectric ever verified in experiments communication range. ultralow loss signal also demonstrated experimentally (−0.96 dB). Furthermore, an chip containing seven major (AND, OR, NOT, NAND, NOR, XOR, XNOR) a half adder fabricated, where associated 4.5 μm2. Our work opens up new path toward practical computing.